When wafer-through connections, often denoted TSV (Through-Silicon-Vias), herein referred to as “vias”, are made in semiconductor wafers, wherein the vias are made from wafer native material, as disclosed in applicants own WO 2004/084300, SOI wafers are often used. The vias are in this process formed by DRIE (Deep Reactive Ion Etch) etching of trenches defining the vias, through the handle layer of the SOI wafer. Commonly the depth of the trenches is 380-500 μm. Such deep trenches makes it difficult to precisely define the location and area of the surface of the via on the opposite side from where the DRIE is applied. This becomes a problem in applications where such a surface (i.e. of the via) is used as such, i.e. without further materials deposited, as an electrode for actuation of e.g. mirrors or other movable structures, or for sensing applications where small changes in e.g. capacitance is to be detected.
In U.S. Pat. No. 7,723,810 Miller et al disclose a MEMS device where there are no via structures present and the so called “hot electrodes” are shielded with “overhang” sections protruding over the electrodes so as to provide a shielding effect. The main purpose of this arrangement is to shield the electric field driving the micro-mirror both from the changing conductivity of the surrounding dielectric surfaces and the changing electric field conditions in adjacent micro-mirrors. This is solved by an overhang structure shielding the critical portions of the electrode structure causing unwanted field fluctuations.